The present application relates generally to an improved data processing apparatus and method and more specifically to an apparatus and method for tracking deallocated load instructions using a dependence matrix.
A microprocessor is the heart of a modern computer, a chip made up of millions of transistors and other elements organized into specific functional operating units, including arithmetic units, cache memory and memory management, predictive logic, and data movement. Processors in modern computers have grown tremendously in performance, capabilities, and complexity over the past decade. Any computer program consists of many instructions for operating on data. Processors may be categorized as in-order processors or out-of-order processors.
In modern high-performance processors, instructions may be scheduled for execution out-of-order. Instructions may be scheduled for execution after their source operands are available. Known dynamic instruction schedulers may use dependence matrices (also called wakeup arrays) to track source operands. Dependence matrices were originally introduced for use in processors as a way to track memory dependences among loads and stores and have been used for tracking register dependences in issue queues.
In some implementations, it may be desirable to deallocate instructions from the issue queue as quickly as possible after they have issued to make room for new instructions. However, known dependence matrices only track the availability of a producer if the instruction associated with the producer is still located within the issue queue. Hence instructions may not be deallocated from the queue if consumer instructions are still tracking availability of their results.